Livros e Capítulos

Lista de livros e capítulos publicados por alunos e professores do PGMICRO [2017-2020]:

2020 

Título

Autor Principal

AN IMPROVED TECHNIQUE FOR LOGIC GATE SUSCEPTIBILITY EVALUATION OF SINGLE EVENT TRANSIENT FAULTS

RAFAEL BUDIM SCHVITTZ

AN OVERVIEW ON STATISTICAL MODELING OF RANDOM TELEGRAPH NOISE IN THE FREQUENCY DOMAIN

THIAGO HANNA BOTH

CHALLENGES IN THE DESIGN OF INTEGRATED SYSTEMS FOR IOT

RICARDO AUGUSTO DA LUZ REIS

EFFICIENT SOFT ERROR VULNERABILITY ANALYSIS USING NON-INTRUSIVE FAULT INJECTION TECHNIQUES

VITOR VIANA BANDEIRA

PROCESS VARIABILITY IMPACT ON THE SET RESPONSE OF FINFET MULTI-LEVEL DESIGN

LEONARDO HEITICH BRENDLER

ROBUST FINFET SCHMITT TRIGGER DESIGNS FOR LOW POWER APPLICATIONS

LEONARDO BARLETTE DE MORAES

SOFT ERROR RELIABILITY USING VIRTUAL PLATFORMS

FELIPE ROCHA DA ROSA

2019

Título

Autor Principal

EVALUATING THE IMPACT OF RESISTIVE DEFECTS ON FINFET-BASED SRAMS

THIAGO SANTOS COPETTI

JOINT ALGORITHM-ARCHITECTURE DESIGN OF VIDEO CODING MODULES

CLAUDIO MACHADO DINIZ

LOW-POWER CIRCUIT DESIGN TECHNIQUES FOR HIGH-RESOLUTION VIDEO CODING

GUILHERME PEREIRA PAIM

STRATEGIES FOR REDUCING POWER CONSUMPTION AND INCREASING RELIABILITY IN IOT

RICARDO AUGUSTO DA LUZ REIS

UMA REVISÃO SOBRE O PROBLEMA DE POSICIONAMENTO NO PROJETO DE CIRCUITOS INTEGRADOS MODERNOS

MATEUS PAIVA FOGACA

VLSI-SOC: DESIGN AND ENGINEERING OF ELECTRONICS SYSTEMS BASED ON NEW COMPUTING PARADIGMS

NICOLA BOMBIERI

2018

Ano da Publicação

Autor Principal

ADVANCED LOGIC SYNTHESIS

ANDRE INACIO REIS

ANALYZING AXI STREAMING INTERFACE FOR HARDWARE ACCELERATION IN AP-SOC UNDER SOFT ERRORS

FABIO BENEVENUTI

ANALYZING THE USE OF TAYLOR SERIES APPROXIMATION IN HARDWARE AND EMBEDDED SOFTWARE FOR GOOD COST-ACCURACY TRADEOFFS

GENNARO SEVERINO RODRIGUES

COMO REDIGIR UM PROJETO DE PESQUISA

MARINDIA DEPRA

CONTRIBUTIONS TO MODELING PATENT CLAIMS WHEN REPRESENTING PATENT KNOWLEDGE

SIMONE ROSA NUNES REIS

CONTROL FLOW ANALYSIS FOR EMBEDDED MULTI-CORE HYBRID SYSTEMS

AUGUSTO WANKLER HOPPE

PHYSICAL AWARENESS STARTING AT TECHNOLOGY-INDEPENDENT LOGIC SYNTHESIS

ANDRE INACIO REIS

ZNO THIN-FILM TRANSISTORS FOR COST-EFFICIENT FLEXIBLE ELECTRONICS

FABIO FEDRIZZI VIDOR

2017

Título

Autor Principal

APPLYING TMR IN HARDWARE ACCELERATORS GENERATED BY HIGH-LEVEL SYNTHESIS DESIGN FLOW FOR MITIGATING MULTIPLE BIT UPSETS IN SRAM-BASED FPGAS

ANDRE FLORES DOS SANTOS

CHAOTIC SYNCHRONIZATION OF NEURAL NETWORKS IN FPGA

ELIAS DE ALMEIDA RAMOS

ELECTROMIGRATION INSIDE LOGIC CELLS

GRACIELI POSSER

EXPLORING PERFORMANCE OVERHEAD VERSUS SOFT ERROR DETECTION IN LOCKSTEP DUAL-CORE ARM CORTEX-A9 PROCESSOR EMBEDDED INTO XILINX ZYNQ APSOC

ADRIA BARROS DE OLIVEIRA

VLSI-SOC: SYSTEM-ON-CHIP IN THE NANOSCALE ERA ? DESIGN, VERIFICATION AND RELIABILITY

Thomas Hollstein

Language / Idioma

English  Español

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