{"id":5927,"date":"2014-04-19T15:07:00","date_gmt":"2014-04-19T18:07:00","guid":{"rendered":"https:\/\/www.ufrgs.br\/ppgee\/?post_type=capitulo_de_livros&#038;p=5927"},"modified":"2024-02-19T15:17:42","modified_gmt":"2024-02-19T18:17:42","slug":"multilevel-reliability-simulation-for-ic-design","status":"publish","type":"capitulo_de_livros","link":"https:\/\/www.ufrgs.br\/ppgee\/capitulo-de-livros\/multilevel-reliability-simulation-for-ic-design\/","title":{"rendered":"MULTILEVEL RELIABILITY SIMULATION FOR IC DESIGN"},"content":{"rendered":"\n<p class=\"wp-block-paragraph\">SUTARIA, K. B., VELAMALA, J. B. A., WIRTH, G. I., SATO, T., CAO, YU, , MULTILEVEL RELIABILITY SIMULATION FOR IC DESIGN. In: Bias Temperature Instability for Devices and Circuits, ISBN: 9781461479093, Springer. http:\/\/link.springer.com\/chapter\/10.1007%2F978-1-4614-7909-3_28, 2014.<\/p>\n","protected":false},"template":"","categoria_cap":[268],"class_list":["post-5927","capitulo_de_livros","type-capitulo_de_livros","status-publish","hentry","categoria_cap-gilson-inacio-wirth"],"_links":{"self":[{"href":"https:\/\/www.ufrgs.br\/ppgee\/wp-json\/wp\/v2\/capitulo_de_livros\/5927","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.ufrgs.br\/ppgee\/wp-json\/wp\/v2\/capitulo_de_livros"}],"about":[{"href":"https:\/\/www.ufrgs.br\/ppgee\/wp-json\/wp\/v2\/types\/capitulo_de_livros"}],"wp:attachment":[{"href":"https:\/\/www.ufrgs.br\/ppgee\/wp-json\/wp\/v2\/media?parent=5927"}],"wp:term":[{"taxonomy":"categoria_cap","embeddable":true,"href":"https:\/\/www.ufrgs.br\/ppgee\/wp-json\/wp\/v2\/categoria_cap?post=5927"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}