Papers SIM 2021

SIM 1: AV1 Hardware Design
Segunda, 26 de abril, das 10:00 às 10:50

Hardware Design of Directional Intra-Prediction Decoder for the AV1 Codec
Jones Goebel, Luciano Agostini, Bruno Zatt and Marcelo Porto

VLSI implementation of the Smooth Interpolation Filter for AV1 codecs
Bruna Suemi Nagai, Daiane Freitas, Guilherme Corrêa and Mateus Grellert

A Hardware Architecture for the AV1 Intra Frame Prediction Using Operation Sharing
Luiz Neto, Marcel Moscarelli Corrêa, Daniel Palomino, Luciano Agostini and Guilherme Corrêa

Low-Power and High-Throughput Approximated Architecture for AV1 FME Interpolation
William Kolodziejski, Robson Domanski, Marcelo Porto, Bruno Zatt and Luciano Agostini

Deblocking Filter Architecture for UHD AV1 Decoder Targeting UHD Videos
Eduardo Zummach, Roberta Palau, Jones Goebel, Guilherme Correa, Luciano Agostini and Marcelo Porto

AE-AV1: a pipelined architecture for the AV1 arithmetic encoder
Tulio Pereira Bitencourt, Fábio Ramos and Sergio Bampi

SIM 2: Approximate Design and Tools
Segunda, 26 de abril, das 11:00 às 11:50

Two-Level Approximate Logic Synthesis
Gabriel Ammes, Walter Lau Neto, Paulo Butzen, Pierre-Emmanuel Gaillardon and Renato Ribas

Combining Refactoring and Approximated-Adders to Design Energy-efficient Gaussian Filters
Marcio Monteiro, Pedro Aquino, Ismael Seidel, Mateus Grellert, Leonardo Soares, Jose Luis Güntzel and Cristina Meinhardt

An Automatic Flow for Precise and Approximated Synthesis
Isac Campos, Augusto Berndt, Brunno de Abreu, Jônata Carvalho, Mateus Grellert and Cristina Meinhardt

Exploring 4-bit Approximated Comparators on a Decision Tree Classification Model
Pedro Aquino Silva, Mateus Grellert and Cristina Meinhardt

An Approximate Functions Generation Method to ATMR Architecture
Guilherme Barbosa Manske, Leomar Soares da Rosa Junior and Paulo Francisco Butzen

SIM 3: Analog Design and Backend I
Terça, 27 de abril, das 09:00 às 09:50

Modified Polar Volterra series with thirty-two independent truncations applied in modeling of competing dual-band power amplifiers
Bianca Oliveira, Luis Schuartz and Eduardo Lima

Modelling the Equivalent Output Resistance of Integrated SC DC-DC Converters Including Source Resistance Effects
Luis Felipe Machado Dutra, Alessandro Gonçalves Girardi and Lucas Compassi-Severo

Analysis and Optimization of Fine-Pitch Gold Wire Ball Bonding Thermosonic Parameters
Arthur L. Bohn, Cassiano S. de Campes, Sandro J. Rigo and Rodrigo M. de Figueiredo

Simulation of a multimode CMOS power amplifier with LTE signals
Enzo Coutinho, Bruno Tarui and Bernardo Leite

A 0.6-V Rail-to-Rail Input 3-Bit Flash ADC in 180-nm
Ramon H. Vieira, Edivania F. Silva and Paulo C. C. de Aguirre

A Versatile Discrete-Time Wake-up Receiver for LoRaWAN applications
Fernando Ferreira, Pietro Ferreira and Sandro Ferreira

SIM 4: Analog Design and Backend II
Terça, 27 de abril, das 10:00 às 10:50

Analysis of the Quantization Noise Impact on a QAM demodulator using a Python Toolbox
Arthur C. Morbach, Jonas D. de Castro and Sandro B. Ferreira

Design of an Information-Set Decoder in CMOS 130 nm
Jefferson Rodrigo Schuertz, Carlos Alexandre Gouvea da Silva and Sibilla Batista da Luz França

IR-UWB Pulse Synthesizer Based on a Sample & Hold Envelope Shaping Circuit
Felipe Schoulten, André Mariano, Rémy Vauche, Sylvain Bourdel, Jean Gaubert, Nicolas Dehaese and Hervé Barthelemy

A Single-Stage Rail-to-Rail OTA for sub-0.5V Applications
Martina Rodrigues and Paulo Aguirre

Design of a 1-bit Analog-to-Digital Converter in CMOS Technology Dedicated to 5G Communication Systems
Alexandre Z. Morais and Andre Mariano

SIM 5: Arithmetic/Processor Circuits Design and Tools
Quarta, 28 de abril, das 09:00 às 09:50

Improving the Design of FFT Architectures Using Multiple Constant Multiplication

Sidinei Ghissoni and Eduardo Costa

Evaluation of Variability Aspects in a FinFET NAND-Based Full-Adder
Gerson Andrade, Eduardo Costa and Alexandra Zimpeck

A Terabit Hybrid FPGA-ASIC Platform for Switch Virtualization
Leonardo Reinehr Gobatto, Mateus Saquetti Pereira de Carvalho Tirone, Raphael Martins Brum, Bruno Zatt, Samuel Nascimento Pagliarini, Weverton Luis da Costa Cordeiro and José Rodrigo Furlanetto Azambuja

A Non-Volatile Processor Design Using Shadow Registers Based on STT-MTJs
Bruna Cagliari, Paulo Butzen and Raphael Brum

SIM 6: Energy Saving Design and Analysis
Quarta, 28 de abril, das 10:00 às 10:50

An Energy-Efficient Wavelet Haar Transform Architecture for Respiratory Signal Processing
Morgana Macedo Azevedo Da Rosa, Henrique Bestani Seidel, Guilherme Paim, Eduardo Da Costa, Sérgio Almeida and Sergio Bampi

Alternative Approaches to Explore Energy-efficient Multipliers
Vinícius Zanandrea, Douglas Borges, Vagner Rosa and Cristina Meinhardt

A Low-impact overhead technique for configurable and energy-efficient 2D Gaussian Filter Design
Talita Borges, Cristina Meinhardt and Leonardo Soares

Energy consumption comparison on Crossbar Memories
Bruno Soares Zimmer, Paulo Francisco Butzen and Raphael Martins Brum

A Design Flow of Tree-Based Inference Engines for Low-Power Learning Applications
Brunno Abreu, Mateus Grellert and Sergio Bampi

SIM 7: Fault Tolerance and Test
Quinta, 29 de abril, das 09:00 às 09:50

Majority Voters Fault Tolerance Evaluation
Ingrid Oliveira, Rafael Schvittz, Leomar Rosa Jr, Rafael Soares and Paulo F. Butzen

A Tool Based on the Monte Carlo Method to Assess Fault Masking in Digital Circuits
Clayton Farias, Paulo Butzen, Rafael Schvittz and Vagner Rosa

Exploitation of Fault Tolerance Techniques in Multicores APSoCs
Newton Lacerda, Débora Matos and Fernanda Kastensmidt

Gate Mapping and Voltage Influence on Radiation Robustness: a C17 Benchmark Case-Study
Bernardo Borges Sandoval, Leonardo Heitich Blender, Alexandra L. Zimpeck, Fernanda L. Kastensmidt, Ricardo Reis and Cristina Meinhardt

Robustness Evaluation of DICE SRAM at the limits of bulk CMOS and FinFET technologies
Cleiton M. Marques, Maria Eduarda de Melo Hang, Leonardo H. Brendler, Alexandra L. Zimpeck, Ricardo Reis, Cristina Meinhardt and Paulo F. Butzen

SIM 8: AI and Statistics
Quinta, 29 de abril, das 10:00 às 10:50

Electrical Behavior Prediction Of An Inverter Using Machine Learning Algorithms
Gabriel Lima Jacinto and Cristina Meinhardt

A Study on State-of-the-Art Techniques for Recognizing Vehicle Plates in Real-Time
George de Borba Nardes and Cesar Albenes Zeferino

Exploring Perceptron Architectures for Power-Efficient Neural Networks
Luis Antonio Simon, Brunno Abreu and Mateus Grellert

Stroke Detection Separation Algorithm for Storm Detector Network (SDN)
Augusto Mathias Adams, Armando Heilmann and César Augusto Dartora

Quality and Complexity Evaluation of Learning-Based Image Compression Techniques
Joao Dick, Brunno Abreu, Mateus Grellert and Sergio Bampi

SIM 9: EDA
Sexta, 30 de abril, das 09:00 às 09:50

A Placement-Based Predictor For DRVs Considering Advanced Routing Constraints
Sheiny Almeida, Aysa Tabrizi, Erfan Aghaeekiasaraee, Renan Netto, Tiago Fontana, Upma Gandhi, Laércio Pilla, José Luı́s Güntzel, Laleh Behjat and Cristina Meinhardt

Limitations on Using Fixed Gate Reliability Values for Realistic Reliability Circuit Estimation
Matheus Pontes, Rafael Schvittz, Leomar Rosa Jr and Paulo F. Butzen

Bootstrapping Logic Optimization Techniques With Cartesian Genetic Programming
Augusto Berndt, Isac Campos, Brunno Abreu, Mateus Grellert, Jonata Carvalho and Cristina Meinhardt

A Study on STT-MTJ Based Non-Volatile Flip-Flop Topologies
Klaus Holler, Raphael M. Brum and Paulo F. Butzen

CREsT – Circuit Reliability Estimation Tool
Matheus Pontes, Glória Claro, Clayton Farias, Marcio O. da Rocha, Rafael Schvittz, Leomar Rosa Jr and Paulo F. Butzen

Automatic Cell Layout Generation – ALTRAN. Elias de Almeida Ramos
Vitor Hugo F. Maciel, Germano Girondi and Ricardo Augusto da Luz Reis

SIM 10: Video Coding
Sexta, 30 de abril, das 10:00 às 10:50

Complexity Reduction of H.266/VVC Encoders Using Decision Trees
Arthur Cerveira, Bruno Zatt, Luciano Agostini and Felipe Sampaio

A CTU-based IME Approach for Multiple Block Sizes in a Redundancy-Free Hardware Design
Murilo Perleberg, Vladimir Afonso, Bruno Zatt, Luciano Agostini and Marcelo Porto

Evaluations of Video Decoding for EnablingProcessing-in-Memory Design
Garrenlus Souza, Felipe Sampaio, Sergio Bampi and Bruno Zatt

A Hardware Design for 3D-HEVC Depth Intra Skip with Synthesized View Distortion Change
Vinicius Borges, Murilo Perleberg, Vladimir Afonso, Marcelo Porto and Luciano Agostini

Analysis of the Versatile Video Coding Standard Complexity and Compression Efficiency
Icaro Siqueira, Guilherme Corrêa and Mateus Grellert